1. Field of the Invention
The present invention relates to interconnect schemes for semiconductor devices, and, more particularly, to an interconnect system for such devices evidencing exceptional reliability and high speed, not requiring dog-bone overlapping contacts.
2. Description of the Prior Art
In general, there is no single integrated circuit (IC) interconnect material which is highly electromigration stress-resistant, of low electrical resistivity and easy to pattern by dry etching. One potential future exception is gold, which, however, is very expensive, is presently impossible to pattern by dry etching and requires the use of complex adhesion layers and barriers.
The two remaining potential exceptions are tungsten and molybdenum, which have only moderately low resistivity but are patternable with dry etching and have extremely good electromigration resistance. Tungsten and molybdenum do not stick well to oxides and are often highly stressed, resulting in delamination. Tungsten, as deposited by chemical vapor deposition (CVD), can have resistivity as low as 10 .mu..OMEGA.-cm, which is about three times that of aluminum. At the present time, CVD tungsten still requires an adhesion layer to make it stick to oxides. This is due to its inability to reduce SiO.sub.2.
Thus, it appears that to have both exceptional reliability and high performance in an IC interconnect, some combination of electromigration-resistant tungsten (or molybdenum), as deposited by either CVD or sputtering and a low resistivity material for speed such as aluminum, gold or copper should be used together. As stated earlier, the use of gold (and the use of copper) presently precludes the use of dry etching given the restriction of using current photoresist masking technology, which limits etch temperature excursions. Without excessive temperature, copper cannot be dry-etched with good selectivity.
It has been proposed many times to clad CVD tungsten with either aluminum (by sputtering) or gold or copper (by sputtering or by plating). These approaches will serve to reduce the interconnect resistivity, yet will maintain a high resistance to electromigration-induced voiding and electrical open circuits, due to the presence of the refractory. However, these approaches add a host of new problems.
Recent reliability testing within the IC industry is showing that electromigration failures can take on a new form when aluminum is underlaid, overlaid, or interlayered with electromigration-resistant refractory metals such as titanium, titanium tungsten, titanium nitride, tungsten or molybdenum. What happens is that the refractory films do indeed eliminate electromigration-induced opens or voids from totally penetrating the entire clad metal sandwich of the interconnection. That is, the aluminum still migrates and voids, but the refractory portion of the interconnect does not.
Unfortunately, the aluminum migrates or moves even faster and more uniformly when the refractory is present because at least one new large area interface is available for aluminum to migrate in, i.e., the refractory/aluminum interface. Thus, electrical opens due to voids are eliminated at the expense of causing a new potential failure. That new potential failure is aluminum whisker formation. In short, the increased quantities of aluminum flowing along the line, and in the new interface, in the direction of the electron flow pile up at the end of the line and ultimately burst out in the form of aluminum whiskers, breaking adjacent dielectric overlayers and causing electrical shorts.
Thus, the concern about interconnect electromigration becomes one of short circuits, and testing can no longer be done on isolated interconnects as it can be for open circuits. This invention suppresses or eliminates the aluminum whisker problem while also solving the easier opens, or voiding, problem. In addition, this invention results in 100% tungsten to tungsten or tungsten to silicon contacts, which are greatly more electromigrationresistant than aluminum contacts while also increasing contact step coverage to 100% from the 25 to 50% range typical of conventional aluminum contacts. Better step coverage means better electromigration resistance due to lack of thickness reduction at steps.
Three periodically proposed variations of the clad tungsten (W) approach involve cladding the top of CVD tungsten with either aluminum or with gold (termed "capping") or cladding the top and sides (termed "encapsulating") of CVD tungsten with gold (the tungsten having been previously deposited and patterned on a semiconductor substrate).
The first two variations produce a substantial increase in the aspect ratio of line height to line width as well as require the use of complex multistep plasma dry-etching processes. The increase in thickness makes the already difficult task of later oxide planarization over the metal lines even more difficult. The third variation requires the use of gold plating, an anathema to IC processing engineers because of its ionic and organic dirtiness and difficulty of control.
Additionally, the use of gold in CMOS technology gives rise to extraordinary problems, since gold is an extremely efficient life-time killer in MOS devices. The use of gold also results in the lack of an interfacial adhesive bond between the gold and the overlying oxide. Thus, adhesion and the ingress of moisture along such interconnect/oxide interfaces becomes a reliability issue.
Furthermore, CVD tungsten as practiced today may employ a CVD tungsten silicide (WSi.sub.x) or amorphous silicon (.alpha.-Si) adhesion layer, which would have negligible ability to prevent gold from penetrating into the device junctions even at very low temperatures of about 200.degree. C.
Turning now to yet another electromigration problem, electromigration at contacts made to underlying silicon or contacts between metal layers is rapidly becoming another dominant failure mechanism. Such contacts, in the case where they incorporate undesirable contamination, are particularly unreliable. For example, forming intermetal contacts from a CVD tungsten or WSi.sub.x upper level interconnect down to an aluminum-capped lower level interconnect results in the formation in the tungsten/aluminum or WSi.sub.x /aluminum interface of an aluminum fluoride compound having high electrical resistance.
This formation is due to the exposure of the aluminum to the WF.sub.6 reactant in the CVD tungsten process chemistry. Such a dirty contact would fail quickly under electromigration stress compared to a clean aluminum to aluminum contact. The performance of a clean tungsten-to-aluminum contact would fall between the latter two in that a dissimilar refractory/aluminum interface, although not dirty, acts as a discontinuity as seen by moving aluminum atoms. It is always better to not have dissimilar materials forming abrupt contact interfaces when one material has poor electromigration resistance.
Although it may be argued that to avoid the above aluminum fluoride problem one could, during contact etching down to an aluminum-clad underlying tungsten interconnect, etch any exposed aluminum away, this is, in practice, very difficult to do without having problems with sidewall polymer formation on the aluminum cap being etched in the bottom of an already deep contact hole. The polymer sidewall residue formation in the narrow contacts, which must later see high temperature tungsten CVD chemistry, would be a major outgassing problem, and the ability of conventional contact sputter-etch precleaning before CVD to clean up the polymer would be very limited, due to its inaccessibility. Such polymers form on contact sidewalls as a consequence of normal aluminum etching processes designed to promote anisotropic etching and silicon or copper removal if aluminum doped with silicon and copper is used.
It may also be argued that such aluminum capping material may be wet-etched. Although no polymer will be formed, this approach makes corrosion a major problem, due to the inability to flush the etchant out of the contact hole.
Given that it would be extremely difficult to use an upper level CVD tungsten interconnect layer to make contact down to an aluminum clad tungsten underlying interconnect layer due to the aluminum fluoride and polymer/etching problems described above, what is really desired is the isolation of the aluminum from the contactetching and contact-forming operations. As stated earlier, the tungsten to tungsten and tungsten to silicon electromigration resistance of this approach is also desirable and significantly superior.
It might be argued that a simpler approach for fabricating the Al- or Au-clad CVD tungsten interconnects and contacts described above would be to use a larger thickness of the aluminum or gold cladding and a smaller thickness of CVD tungsten underneath. Unfortunately, it is desired to use as much CVD tungsten as possible to fill the contact vias because aluminum sputtering technology cannot get aluminum into high aspect deep contacts in a void-free manner without excessive RF biasing during deposition. The amount of tungsten necessary is (in thickness) something greater than the radius of the largest via needing filling.
Typically, no devices other than memories can be designed efficiently with one contact size, and in actuality, even memories have some large contacts for power and ground. Thus, in practice, all vias (contacts) on a given device cannot be totally plugged with tungsten. As a consequence, the larger contacts are not only not filled, but also become reentrant (i.e., undercut, with a negative slope). This is because tungsten CVD is not conformal and deposits less thickness at the bottom of a contact or groove, especially as this amount deposited increases.
In the prior art described, this will be an etch problem at edges where reentrant tungsten will mask aluminum located within the reentrant. This aluminum gets under such overhangs in typical aluminum sputtering processes. Reactive ion etching (RIE) of the aluminum as step 1 of the two step etch to pattern a tungsten interconnect overlaid with aluminum will not get to such hidden aluminum. During the second RIE step, the tungsten etch chemistry will stall on the hidden aluminum. Again, adjustments made to come up with an etch chemistry which attacks both layers equally results in more unwanted tradeoffs.
A final disadvantage of current prior art approaches described herein is that they require that during the etching of a given metal interconnect level, one must never permit the underlying interconnect layer to be exposed to the etch. This has always been the case for conventional aluminum-only interconnects because the underlying layer being exposed in a contact could be attacked, undercut, or even eliminated. For the tungsten/aluminum system described above, it is even more of a problem because the amount and projected thickness of each metal in a contact varies with the degree of filling of each sublayer of the bilayer. By insuring that the contacts are always 100% covered by a dogbone-shaped pad of overlying metal, one avoids the problem at the expense of interconnect density. Underlying metal is thus always protected by overlying metal pads at contacts.
Summarizing the foregoing problems presently encountered in attempting to fabricate 100% tungsten to tungsten or tungsten to silicon contacts of exceptional reliability while also forming an interconnect impervious to both electromigration opens and shorts and having high speed, it is seen that CVD tungsten chemistry poisons aluminum contacts with aluminum fluoride which ruins reliability and contact resistance, while etching through an aluminum cap causes polymer or corrosion problems. Reentrants in CVD tungsten cause aluminum etch ribbons. The prior art, as described, has not addressed the problem of aluminum whiskers at all. Current practice precludes elimination of dogbones to gain packing density.